PCB Trace Estimator

Estimate trace width or current capacity

Try an example: Width for 1 A on external 1 oz copper · Current for a 20 mil internal trace

How it works

Estimate copper trace width or current, resistance, voltage drop, and power loss using the IPC-2221 equation.

Uses the empirical IPC-2221 relation I = k × ΔT^0.44 × A^0.725, with copper cross-sectional area in square mils. The coefficient is 0.048 for external and 0.024 for internal layers.
Solves the equation for cross-sectional area and width, or solves for current at a given width. A nominal 1 oz/ft² copper weight is converted to 0.0348 mm.
Estimates resistance at 20 °C from copper resistivity 1.72 × 10⁻⁸ Ω·m and the specified length and area; voltage drop is I × R and power loss is I² × R.
Flags inputs outside the IPC-2221 chart range (up to 35 A, widths up to 400 mil, 10–100 °C rise, 0.5–3 oz/ft² copper), where the curve fit is an extrapolation.

An empirical estimate for an isolated rectangular trace, not a fabrication design-rule check or board-level thermal analysis. Resistance, voltage drop and loss use copper resistivity at 20 °C and do not include heating, plating, vias or adjacent copper. Input limits are numerical safeguards, not a validated operating range; verify the finished copper thickness and design with your fabricator.

Sources

PCB Trace Width and Current Calculation (equation 7 in TIDUCS7) (Texas Instruments)

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Estimate a copper trace

Estimate trace width, current and voltage drop with the IPC-2221 equation.

What it is for

Use the PCB Trace Estimator to make a first estimate of the width of an isolated copper trace for an intended current and temperature rise. You can also reverse the calculation: enter an existing width and estimate its current for the selected rise. The tool reports resistance, voltage drop and power loss for the specified trace length.

The calculation follows the empirical IPC-2221 relationship using separate coefficients for external and internal layers. It is a starting point for a design, not a manufacturer’s design-rule check or a board-level thermal simulation. Ask your board manufacturer about its capabilities and verify critical traces in the finished design.

Worked example

Choose Width for a current, External, 1 A, 1 oz/ft² copper, a 10 °C rise, and a 100 mm trace length. The resulting width is approximately 0.302 mm (11.9 mil). The estimated resistance at 20 °C is approximately 0.164 Ω, so the drop is about 0.164 V and the loss is about 0.164 W at 1 A.

Try changing the layer to Internal. The estimate grows because the equation uses a smaller coefficient for internal traces. Switch to Current for a width, enter the earlier width, and choose the original external layer and assumptions; the current should return close to 1 A, apart from rounding.

The current and width fields are both visible; only the one for the selected calculation is used. The length affects the loss figures, not the width or current estimate.

Now ask for 50 A. The width is still calculated, but a second warning says the inputs are outside the IPC-2221 design charts (up to 35 A, widths up to 400 mil, a 10–100 °C rise and 0.5–3 oz/ft² copper), and withinChartRange is false in the API result. Treat such values as an extrapolation.

How to read the result

Width is shown in millimeters and mils; one mil is one thousandth of an inch. Copper may be entered as a nominal weight in oz/ft² or as a thickness in millimeters. The tool uses 0.0348 mm for nominal 1 oz/ft² copper. Confirm the actual finished thickness, including fabrication tolerances, with your manufacturer.

Temperature rise is the increase above the surrounding temperature, not the maximum trace temperature. The resistance uses copper resistivity at 20 °C. Voltage drop and power loss use that same resistance, so they are not corrected for the warmer trace.

Tips and common mistakes

A real board has nearby traces, copper planes, vias, solder mask, airflow and other heat sources; none are modelled, nor are pulsed current or plating. Choose appropriate margin and validate the completed layout, especially for safety-critical or high-current designs.

A long trace may meet the thermal estimate yet have too much voltage drop. Check both the electrical loss and the board’s manufacturing constraints. Round any selected width up to a practical value and separately check clearances, vias, connectors and other design rules.

FAQ

Does this replace a PCB design-rule check?

No. It estimates an isolated trace using an empirical equation; it does not inspect your board or your manufacturer’s fabrication rules.

Why does the internal layer need more width?

The IPC-2221 estimate uses a lower coefficient for internal traces. The actual temperature depends on the full board and environment, which this tool does not simulate.

Does the power-loss result include heating?

No. The resistance, voltage drop and power loss use copper resistivity at 20 °C. Copper resistance changes with temperature, so verify the operating conditions separately.

Guide last updated: October 31, 2026

For scripts and AI agents

JSON API: POST https://ohmforgepcbtraceestimator.usefulweb.site/api/v1/calculate (same calculation as this page)
Interface description: OpenAPI 3.1 · AI guide: llms.txt
MCP server (Streamable HTTP): https://ohmforgepcbtraceestimator.usefulweb.site/mcp · tool name ohmforge_pcb_trace_estimator

Example request

curl -s -X POST https://ohmforgepcbtraceestimator.usefulweb.site/api/v1/calculate \
  -H 'content-type: application/json' \
  -d '{"mode":"width","layer":"external","currentA":1,"copper":1,"copperUnit":"oz","temperatureRiseC":10,"length":100,"lengthUnit":"mm"}'

Feedback · ideas & bug reports welcome